High-performance computing applications, and other similar applications, may benefit from increasing the size of interconnection networks, such as by increasing the number of ports supported by switch devices in an interconnection network and/or by increasing the speed of such ports. Increasing the number of ports, and/or the speed of such ports, may require additional packet processing bandwidth in the switch devices, and additional bandwidth to the memory subsystem of the switch devices, e.g. such that the switch devices have adequate throughput to handle the aggregate data rate of incoming packets.
However, many of the applications supported by the switch devices may benefit more from additional throughput of the switch processing pipeline than from additional packet processing. The switch devices may be able to achieve additional throughput of the switch processing pipeline by allowing more attached bandwidth than the throughput of the packet processing pipeline. For example, a switch device may include an absorption buffer before the packet processing pipeline to absorb incoming packets, e.g. when the processing packet pipeline bandwidth is fully subscribed. However, the inclusion of an additional buffer may add cost to the switch device and the additional buffer may also consume area and power. In addition, the size of the packets received by the switch device may vary. Therefore one or more large packets may completely fill the absorption buffer, which would prevent additional packets from being buffered and thereby detrimentally impacting throughput.